The invention concerns an electro-optical display screen using control transistors and, more especially, to a flat screen in which the control of each pixel to be displayed is provided by a control transistor. The invention can be applied to the building of large, liquid crystal flat screens, the control points of which are made by integration in the form of thin films.
In the prior art, these screens generally comprise a large number of square-shaped or rectangular-shaped elementary points or pixels. These pixels have to be addressed individually. The resolution of the screen depends on the number of pixels capable of receiving a datum. Each point is controlled by applying an electric field through the liquid crystal. For the display of alphanumeric or graphic data, matrix type displays have been proposed. Each pixel is then defined by the intersection of two systems of mutually perpendicular conductors known as rows and columns.
The addressing of these matrix display screens is becoming increasingly important in proportion to the degree to which their resolution (i.e. the number of pixels) is sought to be increased.
Since the pixels are addressed in a row-by-row sequence, the number of rows that can be addressed is generally limited by the electro-optical effect characteristics of the liquid crystal used. Thus, the possibility of addressing a large number of rows (&gt;100) is achieved to the detriment of the other characteristics of the screen (i.e. by reducing contrast and increasing dependence on the angle of vision). To improve the efficiency of these screens, a transistor or a non-linear element can be placed in series with each pixel (constituting a capacitor). The unit then behaves like a memory element.
Current technological requirements as regards display screens are for improved image resolution. For screens of the matrix display type, this fact leads us consider devices with a large number of addressing rows or columns. Their number can go up to 1024 or even more. This entails a concomitant increase in the number of control transistors. For batch production, it is particularly necessary to obtain high efficiency, good reproducibility and high stability of these components. It is further necessary to suit (again with good reproducibility) the electrical characteristics of the component to those of the associated cell.
A currently usual way of coping with this problem is to do the addressing by means of a matrix of thin-film transistors: this means coupling the electro-optical effect directly to a giant (but low-resolution) "integrated circuit" which has the task of switching and storing data.
This approach raises definite technological difficulties in the making of both the thin-film transistors and the interconnecting conductor levels. In particular, it is imperative that none of the numerous intersections between the rows and columns of the interconnection network should be defective.
For, in a commonly-employed technique, the transistors are located at the points where the row conductors intersect the column conductors which are insulated from one another, such that a suitable difference in potential applied between a row and a column determines the conduction of the transistor connected between this row and this column.
However, this mode of embodiment as described in the American Pat. No. 3 824 003 published on 16 July 1974, can give rise to short circuits between a row and a column, making the liquid crystal cell at the intersection between this row and this column inoperative.
To avoid this risk of a short circuit, it was proposed, as described in the French patent application No. 2 553 218 published on 12 Apr. 1985, to eliminate any intersection between a row conductor and a column conductor on the same side of a liquid crystal cell. To do so, it was planned to duplicate the row conductors on the surface of the cell that bears the transistors and to transfer the column conductors to the other surface of the liquid crystal cell. Thus, two row conductors would be associated with each row of transistors. A transistor has, for example, its gate electrode connected to one of the row conductors, its source connected to the other row conductor and its drain connected to the column conductor by means of the liquid crystal cell.
However, this solution has the disadvantage of doubling the number of row conductors. Moreover, this increase in row conductors makes it more difficult to gain access to the ends of these conductors.
The invention therefore pertains to a device to mitigate these disadvantages by simplifying the structure of the addressing matrices with thin-film transistors.